feat(libc): implement the compiler-rt floating-point builtins - #6330

What

Implements the 66 compiler-rt floating-point builtins that the system libc.prx exports and AnyPS5 did not have, in a new src/FloatBuiltins.cpp:

• arithmetic __add, __sub, __mul, __div (sf3, df3), __neg{s,d}f2
• comparisons __eq, __ne, __lt, __le, __gt, __ge, __unord (sf2, df2)
• __extendsfdf2, __truncdfsf2
• float, double and x87 to 32/64/128-bit integers (__fix*, __fixuns*) and back (__float*, __floatun*)
• complex __mul{s,d,x}c3, __div{s,d,x}c3, and __powixf2

The console ships an older compiler-rt built with FMA contraction, and these follow that binary (the libc.prx bundled with PPSA08427) rather than current compiler-rt:

• the soft-float arithmetic and __truncdfsf2 always round to nearest, ignore FTZ/DAZ and raise no exception flags; here the SSE instruction runs under a default MXCSR that is restored afterwards (GNU inline asm, as Math.cpp already uses), and an invalid operation returns the positive quiet NaN compiler-rt returns instead of the SSE default NaN; __sub* negates the second operand first, like compiler-rt, so a NaN subtrahend comes back with its sign flipped
• __div{s,d}f3 flush a quotient below the smallest normal to a signed zero (old compiler-rt's "Flush denormals to zero")
• __extendsfdf2 keeps signalling NaNs and copies the payload unshifted; __truncdfsf2 quiets and keeps the low 22 payload bits
• float-to-integer conversions do not saturate: the significand is shifted by a count masked to the shift width (32, 64 or 128 bits), as the console code does
• __floatsisf, __floatunsisf and the 128-bit sources round to nearest in integer code; the 64-bit sources use native conversions, which honour MXCSR like the console's cvtsi2s*
• complex multiplication/division use fma exactly where the console's code fuses, a NaN-skipping maximum like its vmaxss/blend sequence, and scale through the x87 like its scalbn (fscale)
• __powixf2(x, 1) returns x unchanged

Recorded in docs/dev/debt/libc.md.

Tested

Linux (CachyOS, GCC Release build, plus a clang -Wall -Wextra syntax check): new guest_float_builtins test passes, as do guest_math and guest_crt. tools/check_conventions.py passes; tools/pr_overlap.py --branch reports no overlap.

Differential test against the console: the libc.prx of PPSA08427 was mapped into a Linux process (PT_LOAD segments, RELATIVE relocations, the stack-protector GOT slot pointed at a dummy guard) and each builtin was called side by side with this implementation on 200,000 random and edge-case inputs (NaNs with payloads, infinities, subnormals, boundary exponents), once with the default MXCSR and once with random rounding modes and FTZ/DAZ, comparing result bits and the MXCSR afterwards. All functions agree bit for bit, except:

• __mul{s,d}c3 and __div{s,d}c3 agree on every value but differ in about 2-6% of cases only in a NaN's payload/sign or in exception flags, because the host fma/logb are not the console's VEX FMA code and libm; noted in the debt entry.
• __floatundidf could not be run on Linux: it is compiler-rt's assembly with a legacy-SSE orpd on an 8-byte-aligned constant, which faults without AMD's misaligned-SSE mode. It is a correctly rounded conversion and is implemented as a native one.

The harness is not part of this PR because it needs the console binary.

Checklist

• Based on current main; no other open PR implements the same functions
• One topic per PR; follow-ups go in a new PR
• No comments in code except technical debt
• Unimplemented paths throw (NotImplemented_nid_no_patch); silent stubs are listed under Silent stubs in their library's technical debt file
• No notes, investigation .md files or images added to the repository (attach them to this PR)
• New third-party code is a submodule built from source
• Generic behaviour, not specific to one title
• Depends on: none
• Unblocks: none
• GPUs tested: n/a
• AI-assisted: yes

🤖 Generated with Claude Code

https://claude.ai/code/session_01Q8tinbP1MUpUaDsbNWnGnu